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hardware:dbbc3

Digital BaseBand Converter 3

Remote Connection

Remote connection to dBBC3 can be done via (addr: dbbc3[hb].*):

  • VNC connection with standard pwd
  • remote desktop with Windows XP user/pwd

=== Installation DDC_V_v123 Notes provided in 20.11.2018

  1. Copy executable file 'DBBC3 Control_V_v123.exe' into bin folder or Desktop
  2. Copy firmware files 'dbbc3_ddc-V_v123*.bit' into DBBC_CONF/FilesDBBC
  3. Copy config files:
    • 'dbbc3_config_file_V_123.txt'
    • 'config_ddc_V.txt' / 'config_ddc_V_12bbc.txt'
    • 'config_adb3l.txt'
    • 'ddc_v_core3H_#.fila10g' / ddc_V_12bbc_core3H_#.fila10g'

Start DBBC3 Control

Select dBBC3 ops mode and version control. Initial options:

  1. Select N Configure and N Initialise for a quick start and load of the pre-settings (1 min).
  2. Select N Configure and Y Initialise for loading (5-10 min).
  3. Select Y Configure to flash the firmware into the FPGA's and initialisation of the system (20 min).

Launch DBBC Client v4. exe to communicate and launch the dBBC3 commands.

Calibration of the DBBC3

  1. Calibrate offset
  2. Calibrate delay
  3. Calibrate gain

Calibrate offset

  • dbbcif{a,b,c,d,e,f}=2,60 - Set a strong attenuation for each of the IF
  • dbbcif{a,b,c,d,e,f} - Check that each TPI value is in the order between 1000 to 8000
  • cal_offset={1,2,3,4,5,6} - Launch the cal_offset program for each the Core boards

One offset calibration per board, so in total it is needed to conduct the offset calibration 6 times.

Calibrate gain

  • dbbcif{a,b,c,d,e,f}=2,agc,1,34000 - Set an intermediate TPI value (34000) and wait until value reach
  • dbbcif{a,b,c,d,e,f}=2,man - Set dbbcif with agc off
  • cal_gain={1,2,3,4,5,6} - Launch the cal_gain program for each the Core boards

Again 6 calibrations are needed.

Calibrate delay

Do it after the gain and offset calibration. Use similar initial settings for each board as in the Calibration gain procedure.

  • dbbcif{a,b,c,d,e,f}=2,agc,1,34000
  • dbbcif{a,b,c,d,e,f}=2,man
  • cal_delay={1,2,3,4,5,6} - Launch the cal_delay program for each the Core boards

Check calibration's quality

  • enablecal=on,on,on
  • enableloop
  • core3hstats=board_nr
  • All sample powers in a 2% variation
  • All bitstats following a proportion of 18-32-32-18%
  • Auto-correlation in the order of 2 Million units.

Last calibration made by Guifré on 19.02.2019.

/home/www/auscope/opswiki/data/pages/hardware/dbbc3.txt · Last modified: 2019/03/11 23:49 by Guifre